Senior ASIC Timing Engineer
Company: NVIDIA
Location: Westford
Posted on: July 14, 2025
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Job Description:
NVIDIA has continuously reinvented itself over two decades. Our
invention of the GPU in 1999 sparked the growth of the PC gaming
market, redefined modern computer graphics, and revolutionized
parallel computing. More recently, GPU deep learning ignited modern
AI — the next era of computing. NVIDIA is a “learning machine” that
constantly evolves by adapting to new opportunities which are hard
to solve, that only we can pursue, and that matter to the world.
This is our life’s work, to amplify human inventiveness and
intelligence. NVIDIA is looking for best-in-class Senior ASIC
Timing Design Engineers to join our outstanding Networking Silicon
engineering team, developing the industry's best high speed
communication devices, delivering the highest throughput and lowest
latency! Come and take a part in crafting our groundbreaking and
innovating chips, enjoy working in a meaningful, growing and
professional environment where you make a significant impact in a
technology-focused company. What you will be doing: You will drive
physical design and timing of high-frequency and low-power DPUs and
SoCs at block level, cluster level, and/or full chip level. Analyze
and optimize design constraints and synthesis parameters to achieve
performance, power, and area targets. Help in driving frontend and
backend implementation from RTL to gds2, including synthesis,
equivalence checking, floor-planning, timing constraints, timing
and power convergence, and ECO implementation. What we need to see:
Great teammate BS (or equivalent experience) in Electrical or
Computer Engineering 8 years experience or MS (or equivalent
experience) with 2 years experience in Synthesis and Timing.
Understanding of DFT logic and hands-on experience in design
closure. Expertise in analyzing and converging crosstalk delay,
noise glitch, and electrical/manufacturing rules in deep-sub micron
processes. Knowledge in process variation effect modeling and
experience in design convergence taking into account process
variations. Experience in critical path planning and crafting
needed. Power user of Static Timing tools like Synopsys PrimeTime
or Cadence Tempus. Solid experience in full-chip/sub-chip Static
Timing Analysis (STA), timing constraints generation and
management, and timing convergence. Proficiency in Python, Tcl and
Make for automation and scripting tasks. NVIDIA is widely
considered to be the leader of AI computing, and one of the
technology world’s most desirable employers. We have some of the
most forward-thinking and hardworking people in the world working
for us. If you're creative and autonomous, we want to hear from
you. The base salary range is 168,000 USD - 310,500 USD. Your base
salary will be determined based on your location, experience, and
the pay of employees in similar positions. You will also be
eligible for equity and benefits . NVIDIA accepts applications on
an ongoing basis. NVIDIA is committed to fostering a diverse work
environment and proud to be an equal opportunity employer. As we
highly value diversity in our current and future employees, we do
not discriminate (including in our hiring and promotion practices)
on the basis of race, religion, color, national origin, gender,
gender expression, sexual orientation, age, marital status, veteran
status, disability status or any other characteristic protected by
law.
Keywords: NVIDIA, Nantucket , Senior ASIC Timing Engineer, Engineering , Westford, Massachusetts
